The Advanced eXtensible Interface (AXI) Master Lite is an AXI4-compatible LogiCORE™ IP product. It provides an interface between a user-created IP core and an AXI4-Lite interface. The AXI4-Lite Master IP supports AXI4-Lite compatible bus mastering operations which are single 32-bit wide read or write data transfers.
Key features are:
- AXI4-Lite Master interface
- Fixed 32-bit data width
- Supports single beat read and write data transfers of up to 4 bytes (32-bits)
- IPIC back-end interface for PLBV46 Master Single migration
Documentation
The COTS version v2.00a is the baseline from which the DO-254 AXI Master Lite 1.00a comes from. Logicircuit applies the DO-254 lifecycle to this COTS version. As a result of this DO-254 process, the source code will be modified with the goal of achieving 100% code coverage, and the resulting code will be named DO-254 AXI Master Lite 1.00a. Below are links to the Xilinx® Product Data for the version that was used as the basis, and the Logicircuit Data Sheet of the resulting DO-254 product.
Link to the Xilinx® Product Specification:
Link to the Logicircuit Data Sheet:
DO-254 AXI Master Lite 1.00a Data Sheet
Device Family Support
Xilinx® Artix™-7
Xilinx® Kintex™-7
Xilinx® Virtex™-7
Xilinx® Zynq™-7000
Xilinx® Spartan®-6
