The Advanced eXtensible Interface (AXI) Quad Serial Peripheral Interface (SPI) connects the AXI4 interface to those SPI slave devices which are supporting the Dual or Quad SPI protocol along with Standard SPI protocol instruction set. As an example, this core provides a serial interface to SPI slave devices such as SPI serial flash from Winbond/Numonyx which support Dual and Quad SPI protocol along with Standard SPI interface. The Dual/Quad SPI is the enhancement to the Standard SPI protocol that delivers a simple method for a master and a selected slave to exchange data.
Key features are:
- Connects as a 32-bit AXI4-Lite slave
- Supports configurable SPI modes – Standard SPI Mode, Dual SPI Mode or Quad SPI Mode
- Supports slave select (SS) bit for each slave on the SPI bus
- Supports programmable clock phase and polarity
- Supports continuous transfer mode for automatic scanning of a peripheral
- Supports configurable FIFO depth (16 or 256 element deep in Dual/Quad/Standard SPI mode)
Documentation
The COTS version v2.00a is the baseline from which the DO-254 AXI Quad Serial Peripheral Interface (AXI Quad SPI) 1.00a comes from. Logicircuit applies the DO-254 lifecycle to this COTS version. As a result of this DO-254 process, the source code will be modified with the goal of achieving 100% code coverage, and the resulting code will be named DO-254 AXI Quad Serial Peripheral Interface (AXI Quad SPI) 1.00a. Below are links to the Xilinx® Product Data for the version that was used as the basis, and the Logicircuit Data Sheet of the resulting DO-254 product.
Link to the Xilinx® Product Specification:
Link to the Logicircuit Data Sheet:
DO-254 AXI Quad Serial Perpheral Interface (AXI Quad SPI) 1.00a Data Sheet
Device Family Support
Xilinx® Artix™-7
Xilinx® Kintex™-7
Xilinx® Virtex™-7
Xilinx® Zynq™-7000
Xilinx® Spartan®-6
