The LMB module is used as the LMB interconnect for Xilinx® FPGA based embedded processor systems. The LMB is a fast, local bus for connecting MicroBlaze™ instruction and data ports to high-speed peripherals, primarily on-chip block RAM (BRAM).
Key features are:
- Efficient, single master bus (requires no arbiter)
- Separate read and write data buses
- Low FPGA resource utilization
- 125 MHz operation
- Delivered with the Embedded Development Kit
Documentation
The COTS version v2.00.b is the baseline from which the DO-254 Local Memory Bus (LMB) 1.00a comes from. Logicircuit applies the DO-254 lifecycle to this COTS version. As a result of this DO-254 process, the source code will be modified with the goal of achieving 100% code coverage, and the resulting code will be named DO-254 Local Memory Bus (LMB) 1.00a. Below are links to the Xilinx® Product Data for the version that was used as the basis, and the Logicircuit Data Sheet of the resulting DO-254 product.
Link to the Xilinx® Product Specification:
http://www.xilinx.com/support/documentation/ip_documentation/lmb_v10/v2_00_b/lmb_v10.pdf
Link to the Logicircuit Data Sheet:
DO-254 Local Memory Bus (LMB) 1.00a Data Sheet
Device Family Support
Xilinx® Artix™-7
Xilinx® Kintex™-7
Xilinx® Virtex™-7
Xilinx® Zynq™-7000
Xilinx® Spartan®-6
